Tanner L-Edit IC – Physical Layout

A complete IC physical design environment

Tanner L-Edit IC is an analog/mixed-signal (AMS) IC physical design environment that gives you all the features you need to quickly and efficiently finish the layout of your design, including:

Schematic Driven Layout (SDL) capability that allows you to create layout that matches the schematic the first time

Node Highlighting for connectivity visualization

Pad I/O cross reference for easy generation of bonding reports.

Key Features:

  • Support both FinFET and Planar technologies down to 12nm
  • Complete hierarchical physical layout including all-angle and curved polygons
  • Reads and writes Open Access with multi-user support
  • Schematic Driven Layout (SDL) and Engineering Change Order (ECO) maintains connectivity during layout
  • Interactive follow the cursor router
  • Import technology and display files from other environments
  • Integration with Calibre and Calibre Realtime software
  • Cross-probe between schematic, layout and LVS report to highlight nets or devices
  • Node highlighting for connectivity visualization
  • Object snapping (gravity) for quick, accurate layout
  • Increase routing productivity with automated instancing of parameterized cells, real-time net fly lines, net completion tracking, geometry marking/highlighting/ by net and ECO tracking.

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