Siemens EDA’s automation of the IEEE 1687 standard
Designing a modern product requires the integration of multiple IP blocks from both in-house and third party sources. The Tessent IJTAG software from Siemens EDA delivers comprehensive automation support for implementing and debugging the IEEE 1687 standard, providing plug-and-play IP test and instrumentation integration.
Tessent IJTAG can be used by IP providers to ensure compliance to the standard as well as by chip designers to efficiently integrate IEEE 1687 compliant IP from various sources into their designs. These capabilities are critical to support the growing amount of IP used in today’s large SoCs.
Key Features:
- Finds and extracts IJTAG ICL network data from gate-level or RTL netlist
- Flexible IEEE 1687 network creation and insertion
- Provides access to IEEE 1687 data structures, attributes and parameters
- Retargets PDL commands from IP boundary to any point within an ICL described IEEE 1687 network
- Generates Verilog testbenches for PDL verification
- Translates chip-level PDL patterns to ATE pattern formats (STIL, WGL)
- Includes advanced introspection and design editing capabilities through Tessent Shell
- Visualization of extracted ICL model
