Embedded memory self-test, repair, and debug
The Tessent MemoryBIST software and IP provides a complete solution for atspeed test, diagnosis, repair, debug, and characterization of embedded memories. The solution’s architecture is hierarchical, allowing built-in self-test and self-repair capabilities to be added to individual cores as well as at the top level.
Key Features:
- Hard and soft programmable algorithm support to balance quality and test time.
- Comprehensive defect coverage for advanced technologies such as FinFET.
- Power-aware test and repair for multiple power domains.
- Fully autonomous hard and soft incremental repair solution for on-chip and off-chip analysis.
- Advanced BIST Access Port (BAP) configurable interface for minimal latency in-system test and reduced ATE test time.
- External memory and 2.5/3D-IC support for multi-die and TSV interconnects.
- Shared-bus interface and full interoperability with 3rd party memory I P.
- Unified characterization and debug platform with Tessent Silicon Insight.
